SiC401A, SiC401BCD

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Vishay Siliconix

S20-0483-Rev. E, 29-Jun-2020

2

Document Number: 63835

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

TYPICAL APPLICATION CIRCUIT AND PACKAGE OPTIONS

Typical Application Circuit for SiC401A/B (PowerPAK MLP32-55G)

FUNCTIONAL BLOCK DIAGRAM

SiC401A/B Functional Block Diagram

PIN CONFIGURATION

SiC401A/B Pin Configuration (Top View)

PAD 1

PAD 3

LX

PAD 2

LX

17

18

19

20

21

BST

FBL

FB

1

2

3

4

5

7

6

8

SS

24

LX

23

22

EN/PSV (Tri-State)

LDO_EN

31 30 29

25

26

27

28

32

Reference

Soft Start

FB

AGND

On- time

Generator

Control & Status

PGOOD

Gate Drive

Control

VIN

PGND

TON

VOUT

Zero Cross Detector

Valley Current Limit

ILIM

ENL

FBL

VLDO Switchover MUX

A

Y

B

LDO

VDD

BST

FB Comparator

-

LX

EN/PSV

Bypass Comparator

Bypass Comparator

NC

NC

A

12

8

27

14

32

5

3

2

31

1

26

29

A = connected to pins 6, 9-11, PAD 2

B = connected to pins 23-25, PAD 3

C = connected to pins 15-22

D = connect to pins 4, 30, PAD 1

B

C

D

VDD

VDD

Bootstrap

Switch

Lo-side

MOSFET

Hi-side

MOSFET

LXBST

13

LXS

28

DL

DL

VDD

VDD

VDD

SS

7

PAD 1

PAD 3

LX

PAD 2

LX

17

18

19

20

21

BST

FBL

VDD

FB

1

2

3

4

5

7

6

8

SS

24

LX

23

22

31

30 29

25

26

27

28

32