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AS5043 Scheda tecnica(PDF) 11 Page - ams AG

Il numero della parte AS5043
Spiegazioni elettronici  PROGRAMMABLE 360째 MAGNETIC ANGLE ENCODER WITH ABSOLUTE SSI AND ANALOG OUTPUTS
PDF  26 Pages
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Produttore elettronici  AMSCO [ams AG]
Homepage  http://www.ams.com
Logo AMSCO - ams AG

AS5043 Scheda tecnica(HTML) 11 Page - ams AG

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AS5043 Programmable 360° Magnetic Angle Encoder
Revision 1.4, 04-Apr-06
www.austriamicrosystems.com
Page 11 of 26
12.2 Analog Mode Programming
The analog output can be configured in many ways:
It consists of three major building blocks,
a digital range preselector,
a 10-bit Digital-to-Analog-Converter (DAC)
and an OP-AMP buffer stage.
In the default configuration (all OTP bits = 0), the analog output is set for 360° operation, internal DAC reference
(VDD5V/2), external OPAMP gain, 0-100% ratiometric to VDD5V.
Shown below is a typical example for a 0°-360° range, 0-5V output. The complete application requires only one external
component, a buffer capacitor at VDD3V3 and has only 3 connections VDD, VSS and Vout (connectors 1-3).
Note: the default setting for the OPAMP feedback path is:FB_intEn=0=external. The external resistors Rf and Rg must be
installed. In the programmed state (FB_intEn=1=internal), these resistors do not need to be installed as the feedback path is
internal (Rf_int and Rg_int).
AS5043
Range
Selector
OR1
OR0
ClampMdEN
0 360° 0
0 180° 1
1 90° 0
1 45° 1
10bit
digital
REF_extEN
0=int
DACref
VDD5V
+
-
0 - 100% VDD5V /2
LDO
3.3V
VDD3V3
916
15
DACout
10
VOUT
12
Rf_int
30k
Rg_int
30k
10bit
analog
FB
11
FB_intEN
1=int
Gain = 2x (int)
CL
<100pF
360°angle
0
Vout
VDD
DAC
1=ext
0=ext
0= 0-100% * Vref (def.)
1= 10-90% * Vref
VDD5V / 2
Vref
VDD
VSS
1-10µF
7
PROG
DO
CLK
CSn
for OTP
programming and
alignment mode
only. Leave open
or connect to VSS
if not used
Digital serial
interface, 10bit/360°.
Leave open if not
used. CSn and CLK
may also be tied to
VSS if not used
34
6
8
MagRngn
Mode
Magnetic field range alarm. Active
low. Leave open or connect to
VSS if not used
Mode pin.
Default = open
(low noise)
OP-Amp feedback pin.
Leave open if not used.
DAC output pin.
Leave open if not used
External DAC reference pin.
Leave open or connect to
VSS if not used
NC
13
Test pins.
Leave open
NC
5
NC
14
2
1
Connect pins 15 and
16 for VDD= 3.0-3.6V.
Do NOT connect for
VDD = 4.5-5.5V !
from
DSP
1
2
3
RLmin
= 4k7
Vout
VSS
Rf
Rg
Figure 14: analog output block diagram



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