SWCS049G datasheet(125/144 Pages) TI

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TRAN(max)

OUT

OVER

OUT max

DS(on)

TRIP

OUT

L max

OUT max

IND

125

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SWCS049S – JUNE 2010 – REVISED AUGUST 2018

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Applications, Implementation, and Layout

(2)

Following Equation 1 and Equation 2, the preferred inductor for VDDCtrl is 2.7 µH, with a DCR of

approximately 20 mΩ.

7.2.2.2.2 Selecting the RTRIP Resistor

The TRIP pin is used to set the VDDCtrl current limit. The load current is sensed by measuring the voltage

over the low-side FET and comparing it to the voltage at the TRIP pin, VTRIP, with an 8:1 ratio. If the low-

side FET is greater than an eighth of VTRIP, the VDDCtrl rail shuts down.

The TRIP resistor then adjusts the range of the VDDCtrl load current monitoring. Use Equation 3 to

calculate the value of the TRIP resistor (RTRIP) for the application and selected external FETs.

where

•

IOUTmax is the maximum load current.

•

ITRIP is the current through the TRIP pin, estimated at 10 µA.

•

RDS(on) is the on resistance from the external FETs.

(3)

7.2.2.2.3 Selecting the Output Capacitors

Texas Instruments recommends using ceramic capacitors with low ESR values to provide the lowest

output voltage ripple. The output capacitor requires an X7R or an X5R dielectric. Y5V and Z5U dielectric

capacitors, aside from their wide variation in capacitance over temperature, become resistive at high

frequencies. At light load currents, the controller operates in PFM mode, and the output voltage ripple is

dependent on the output-capacitor value and the PFM peak inductor current. Higher output-capacitor

values minimize the voltage ripple in PFM mode. To achieve specified regulation performance and low

output voltage ripple, the DC-bias characteristic of ceramic capacitors must be considered. The effective

capacitance of ceramic capacitors drops with increasing DC bias voltage. TI recommends the use of small

ceramic capacitors placed between the inductor and load with many vias to the power-ground (PGND)

plane for the output capacitors of the controller. This solution typically provides the smallest and lowest

cost solution available for DCAP controllers. The selection of the output capacitor is typically driven by the

output transient response. Equation 4 provides a rough estimate of the minimum required capacitance to

make sure the transient response is correct.

where

•

ITRAN(max) is the maximum load current step.

•

L is the selected inductance.

•

VOUT is the minimum programmed output voltage.

•

VIN is the maximum input voltage.

•

VOVER is the maximum allowable overshoot from programmed voltage.

(4)

Because the transient response is affected significantly by the board layout, some experimentation is

expected to confirm that values derived in this section are applicable to any particular use case.

Equation 4 is not provided as an absolute requirement, but as a starting point. Alternatively, lists

recommended capacitor values.

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