RZSLASHT2M datasheet(8/127 Pages) RENESAS

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Note 2. GMAC, ETHSW, and ESC are not supported for 176-pin and 128-pin devices. The 225-pin product also has devices which do not

support GMAC, ETHSW, and ESC.

Note 3. Classical CAN mode only for 176-pin and 128-pin devices. The 320-pin and 225-pin products have devices with Classical CAN

mode only.

Table 1.9

Analog

Feature

Functional description

12-bit A/D converter (ADC12)

● 12 bits × 2 units (unit 0: 8 channels, unit 1: 16 channels)

● 12-bit resolution

● Conversion time

0.84 µs per channel

● Operating mode

Scan mode (single scan mode, continuous scan mode, or 3 group scan mode)

Group priority control

● Sample-and-hold function

Common sample-and-hold circuit included

In addition, channel-dedicated sample-and-hold function (3 channels: in unit 0 only)

included

● Sampling variable

Sampling time can be set up for each channel

● Double trigger mode (A/D conversion data duplicated)

● Three ways to start A/D conversion

Software trigger, timer (MTU3, ELC) trigger, external trigger

● Event linking by the ELC

Temperature sensor unit (TSU)

● 1 channel

● Relative precision: ±3°C

Table 1.10

Hardware accelerator for industrial interfaces

Feature

Functional description

ΔΣ interface (DSMIF)

● 3 channels × 2 units

● Selectable 2 inputs (U/V) or 3 inputs (U/V/W)

● Up to 6 ΔΣ modulators are externally connectable

● Sinc filter can be selected as first, second or third order

● Direct error connection to POE3 and POEG

Arithmetic unit for trigonometric

functions (TFU)

● Sine, cosine, arctangent,

x2+y2

● Simultaneous calculation of sine and cosine

● Simultaneous calculation of arctangent and

x2+y2

Encoder interfaces*1

● EnDat 2.2, BiSS, FA-CODER*2, A-format, and HIPERFACE DSL-compliant interfaces

Note 1. This applies to the devices with the encoder interfaces. For details, contact our sales representative.

Note 2. Under planning

Table 1.11

Safety (1 of 2)

Feature

Functional description

Memory Protection Unit (MPU)

● Cortex-R52 MPU

Two stages MPUs (EL2 and EL1)

24 regions each MPU

● Master MPU

Memory protection for masters except Cortex-R52 (DMAC, USB, Ethernet MAC, CoreSight)

Protects important registers from being overwritten for in case a program runs out of control.

CRC calculator (CRC)

● 2 channels

● CRC code generation for arbitrary amounts of data in 8-, 16-, or 32-bit units

● Select any of four generating polynomials:

– X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X + 1 (32-

Ethernet)

– X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 +

X9 + X8 + X6 + 1 (CRC-32C)

– X16 + X15 + X2 + 1 (CRC-16)

– X16 + X12 + X5 + 1 (CRC-CCITT)

– X8 + X2 + X + 1 (CRC-8)

RZ/T2M Datasheet

1. Overview

R01DS0383EJ0100 Rev.1.00

Mar 22, 2022

Page 8 of 127

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