HT48C10 datasheet(46/59 Pages) HOLTEK

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SWAP [m]

Swap nibbles within the data memory

Description

The low-order and high-order nibbles of the specified data memory (one of the

data memories) are interchanged.

Operation

[m].3~[m].0

↔ [m].7~[m].4

Affected flag(s)

TC2

TC1

–

––

–––

SWAPA [m]

Swap data memory-place result in the accumulator

Description

The low-order and high-order nibbles of the specified data memory are

interchanged, writing the result to the accumulator. The contents of the data

memory remain unchanged.

Operation

ACC.3~ACC.0

← [m].7~[m].4

ACC.7~ACC.4

← [m].3~[m].0

Affected flag(s)

TC2

TC1

–

––

–––

SZ [m]

Skip if data memory is zero

Description

If the contents of the specified data memory are zero, the following instruc-

tion, fetched during the current instruction execution, is discarded and a

dummy cycle is replaced to get the proper instruction (two cycles). Otherwise

proceed with the next instruction (one cycle).

Operation

Skip if [m]=0

Affected flag(s)

TC2

TC1

–

––

–––

SZA [m]

Move data memory to ACC, skip if zero

Description

The contents of the specified data memory are copied to the accumulator. If

the contents is zero, the following instruction, fetched during the current

instruction execution, is discarded and a dummy cycle is replaced to get the

proper instruction (two cycles). Otherwise proceed with the next instruction

(one cycle).

Operation

Skip if [m]=0, ACC

← [m]

Affected flag(s)

TC2

TC1

–

––

–––

HT48CXX/HT48RXX

25th May ’99

HT48C10 Scheda tecnica(PDF) 46 Page - Holtek Semiconductor Inc

HT48C10 Scheda tecnica(HTML) 46 Page - Holtek Semiconductor Inc

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