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TC35679FSG Scheda tecnica(PDF) 16 Page - Toshiba Semiconductor

Il numero della parte TC35679FSG
Spiegazioni elettronici  TC35679FSG-002 Bluetooth® low energy IC
PDF  45 Pages
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Produttore elettronici  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC35679FSG Scheda tecnica(HTML) 16 Page - Toshiba Semiconductor

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TC35679FSG-002
2018-01-17
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4.3. UART Interface
4.3.1.
Features
TC35679 UART interface has the following features.
1.8 to 3.6 V operation
Full-duplex four-wire start-stop synchronization data transfer (Reception data, Transmission data, Reception flow control, and
Transmission flow control)
Selectable between 2-line start-stop synchronous transfer (Reception data and Transmission data) and 4-line start-stop
synchronous transfer (Reception data, Transmission data, Reception flow control, and Transmission flow control)
Start bit field (1 bit), data bit field ( 8 bits, LSB first), stop bit field (1 bit), no parity bit
UART transmit and receive data pins can be switched by the command of HCI mode. (UART2 function)
Programmable baud rate: 9600 bps to 921.6 kbps.
3 (or more) character interval should be inserted between one transmission message and another transmission message.
The length of the interval can be changed by a command.
Error detection (Reception character timeout, Reception overrun error, Reception framing error)
Host wake up function
TC35679 communicates commands, status, and data with a host CPU through UART interfaces. The UART interfaces are shared
with GPIO pins, and during boot process after a reset, TC35679 firmware assigns UART functions to the GPIOs. The UART
interfaces can operate at 1.8 to 3.6 V depending on the VDDIO power supply voltage. Because the power supply pin is shared with
UART interface and the other hardware interfaces, UART interface cannot operate at a different voltage from the others.
4.3.2.
Connection Example
TC35679 UART can be connected with an UART interface on a host CPU. Figure 4-4 shows an example of two-wire start-stop
synchronization data transfer connection with an external host CPU. The timing chart to assign the GPIO pins to the UART function
is shown in Figure 4-5.
Figure 4-4 UART connection example
Figure 4-5 Timing for UART function assignment
Reset
UART Transmit data
UART Receive data
Reset
GPIO Configuration
(Pulled up to high)
UART Communication
Output direction
Input direction
TC35679
UART Received Data (RX)
UART Transmitted Data (TX)
HOST CPU



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