STM32W108CB datasheet(111/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

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9.4

SPI slave mode

Both SC1 and SC2 SPI controllers include a SPI slave controller with these features:

●

Full duplex operation

●

Up to 5 Mbps data transfer rate

●

Programmable clock polarity and clock phase

●

Selectable data shift direction (either LSB or MSB first)

●

Slave select input

The SPI slave controller uses four signals:

●

MOSI (Master Out, Slave In) - inputs serial data from the master

●

MISO (Master In, Slave Out) - outputs serial data to the master

●

SCLK (Serial Clock) - clocks data transfers on MOSI and MISO

●

nSSEL (Slave Select) - enables serial communication with the slave

The GPIO pins that can be assigned to these signals are shown in Table 23.

Direction

GPIO

configuration

SC1 pin

SC2 pin

9.4.1

Setup and configuration

Both serial controllers, SC1 and SC2, support SPI slave mode. SPI slave mode is enabled

by the following register settings:

●

The serial controller mode register, SCx_CR, is ‘2’.

●

The MSTR bit in the SPI configuration register, SCx_SPICR, is ‘0’.

The SPI slave controller receives its clock from an external SPI master device and supports

rates up to 5 Mbps.

The SPI slave controller supports various frame formats depending upon the clock polarity

(CPOL), clock phase (CPHA), and direction of data (LSBFIRST). The CPOL, CPHA, and

LSBFIRST bits are defined within the SCx_SPICR register.

Table 23.

SPI slave GPIO usage

Parameter

MOSI

MISO

SCLK

nSSEL

Input

Output

Input

Alternate Output

(push-pull)

Input

PB2

PB1

PB3

PB4

PA0

PA1

PA2

PA3

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