STM32W108CB datasheet(125/278 Pages) STMICROELECTRONICS

125 / 278 page

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

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Bit 7 CMDFIN: I2C command complete detection pending interrupt

This bit is set by hardware when a STOP or START command is generated correctly by the

master. It is cleared by software writing it to 0.

0: No CMDFIN detected pending interrupt

1: CMDFIN detected pending interrupt

Bit 6 BTF: I2C byte transmit finished pending interrupt

This bit is set by hardware when the transmit operation is completed.

0: Data byte transmit not done pending interrupt

1: Data byte transmit succeeded pending interrupt

Bit 5 BRF: I2C byte receive finished pending interrupt

This bit is set by hardware when the receive operation is completed.

0: Data byte receive not done pending interrupt

1: Data byte receive succeeded pending interrupt

Bit 4 UDR: Underrun pending interrupt

This bit is set by hardware when data are transmitted and the previous data have not yet left

the SCx_DR register.

0: No underrun error pending interrupt

1: Underrun error pending interrupt

Bit 3 OVR: Overrun pending interrupt

This bit is set by hardware when data are received and the previous data have not yet been

read from SCx_DR. As a result, the incoming data are lost.

0: No overrun error pending interrupt

1: Overrun error pending interrupt

Bit 2 IDLE: Idle line detected pending interrupt

This bit is set by hardware when an idle line is detected.

0: No idle line detected pending interrupt

1: Idle line detected pending interrupt

Bit 1 TXE: Transmit data register empty (transmitters)

This bit is set by hardware when the SCx_DR register is empty in transmission.

0: Data register not empty pending interrupt

1: Data register empty pending interrupt

Bit 0 RXNE: Data register not empty pending interrupt (receivers)

This bit is set by hardware when the SCx_DR register is not empty in receiver mode.

0: Data is not received pending interrupt

1: Received data is ready to be read pending interrupt

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