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© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard

C1126_C0G_HV_FF-CAP_SMD • 2/16/2023

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Floating Electrode (FF-CAP), High Voltage with Flexible Termination C0G Dielectric,

500 – 3,000 VDC (Commercial & Automotive Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions cont.

Stress

Reference

Test Condition

Limits

Biased Humidity

MIL-STD-202

Method 103

Load Humidity: 1,000 hours 85°C/85% RH and

200 VDC maximum

Measurement at 24 hours ±4 hours

after test conclusion.

Within Post Environmental Limits

Cap: ±0.3% or ±0.25 pF shift

IR: 10% of Initial Limit

DF Limits Maximum: 0.5%

Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V.

Moisture

Resistance

MIL-STD-202

Method 106

Number of Cycles Required: 10, 24 hours per cycle.

Steps 7a and 7b not required

Cap: Initial Limit

DF: Initial Limit

IR: Initial Limit

Thermal Shock

MIL-STD-202

Method 107

Number of Cycles Required: 5, (−55°C to 125°C)

Dwell time 15 minutes.

Cap: Initial Limit

DF: Initial Limit

IR: Initial Limit

High Temperature

Life

MIL-STD-202

Method 108

1,000 hours at 125°C with 1.2 X rated voltage applied.

Within Post Environmental Limits

Cap: ±0.3% or ±0.25 pF shift

IR: 10% of Initial Limit

DF Limits Maximum: 0.5%

Storage Life

1,000 hours at 150°C, Unpowered

Vibration

MIL-STD-202

Method 204

5 g's for 20 minutes, 12 cycles each of 3 orientations.

Test from 10 – 2,000 Hz

Cap: Initial Limit

DF: Initial Limit

IR: Initial Limit

Mechanical

Shock

MIL-STD-202

Method 213

1,500 g’s 0.5 millisecond Half-sine,

Velocity Change: 15.4 feet/second

(Condition F)

Cap: Initial Limit

DF: Initial Limit

IR: Initial Limit

Resistance to

Solvents

MIL-STD-202

Method 215

Add Aqueous wash chemical OKEMCLEAN

(A 6% concentrated Oakite cleaner) or equivalent.

Do not use banned solvents.

Visual Inspection 10X

Readable marking, no decoloration

or stains.

No physical damage.

Storage and Handling

Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in

other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,

and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp

and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum

storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on

the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock

should be used promptly, preferably within 1.5 years of receipt.