ST25DV64K datasheet(6/197 Pages) STMICROELECTRONICS

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Signal descriptions

2.1

Serial link (SCL, SDA)

2.1.1

Serial clock (SCL)

This input signal is used to strobe data in and out of the device. In applications where this signal is used by slave

devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up

resistor must be connected from Serial clock (SCL) to VCC. See Section 9.2 I2C parameters to know how to

calculate the value of this pull-up resistor

2.1.2

Serial data (SDA)

This bidirectional signal is used to transfer data in or out of the device. It is an open drain output that may be

wire-ORed with other open drain or open collector signals on the bus. A pull-up resistor must be connected from

Serial data (SDA) to VCC (Figure 76 indicates how to calculate the value of the pull-up resistor).

2.2

Power control (VCC, LPD, VSS)

2.2.1

Supply voltage (VCC)

This pin can be connected to an external DC supply voltage.

Note:

An internal voltage regulator allows the external voltage applied on VCC to supply the ST25DVxxx, while

preventing the internal power supply (rectified RF waveforms) to output a DC voltage on the VCC pin.

2.2.2

Low power down (LPD)

This input signal is used to control an internal 1.8 V regulator delivering the internal supply. When LPD is high, the

regulator is shut off and its consumption is reduced below 1 µA. The regulator has a turn on time in the 100 µs

range, to be added to the boot duration, before the device becomes fully operational. The impedance on LDP pin,

when set high, must not exceed 5 kΩ.

This feature is available only on the 10-ball and 12-pin packages. The LPD pin is internally pulled-down.

2.2.3

Ground (VSS)

VSS is the reference for the VCC and VDCG supply voltages and V_EH analog output voltage.

ST25DV04K ST25DV16K ST25DV64K

Signal descriptions

DS10925 - Rev 11

page 6/197

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