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ST25DV64K Scheda tecnica(PDF) 195 Page - STMicroelectronics

Il numero della parte ST25DV64K
Spiegazioni elettronici  Dynamic NFC/RFID tag IC with 4-, 16-, or 64-Kbit EEPROM, and fast transfer mode capability
PDF  197 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST25DV64K Scheda tecnica(HTML) 195 Page - STMicroelectronics

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List of figures
Figure 1.
ST25DVxxx block diagram ............................................................ 3
Figure 2.
8-pin packages: connections with open drain Interrupt output .................................... 4
Figure 3.
12-pin package: connections with CMOS Interrupt output (GPO).................................. 5
Figure 4.
10-ball WLCSP package: connections with CMOS Interrupt output (GPO) ........................... 5
Figure 5.
Power-up sequence (no RF field, LPD pin tied to VSS or package without LPD pin) ..................... 8
Figure 6.
RF power-up sequence (no DC supply) ................................................... 9
Figure 7.
Memory organization ............................................................... 11
Figure 8.
ST25DVxxx user memory areas ....................................................... 13
Figure 9.
RF to I2C fast transfer mode operation................................................... 24
Figure 10.
I2C to RF fast transfer mode operation................................................... 24
Figure 11.
Fast transfer mode mailbox access management. ........................................... 26
Figure 12.
RF_USER sequence ............................................................... 27
Figure 13.
RF_ACTIVITY sequence ............................................................ 28
Figure 14.
RF_INTERRUPT sequence .......................................................... 29
Figure 15.
FIELD_CHANGE sequence .......................................................... 30
Figure 16.
RF_PUT_MSG sequence............................................................ 31
Figure 17.
RF_GET_MSG sequence ........................................................... 32
Figure 18.
RF_WRITE sequence .............................................................. 33
Figure 19.
EH delivery state diagram ........................................................... 41
Figure 20.
ST25DVxxx Energy Harvesting Delivery Sequence .......................................... 42
Figure 21.
Arbitration between RF and I2C ....................................................... 45
Figure 22.
RF security sessions management ..................................................... 55
Figure 23.
I2C security sessions management ..................................................... 56
Figure 24.
I2C bus protocol .................................................................. 62
Figure 25.
I²C timeout on Start condition ......................................................... 63
Figure 26.
Write mode sequences when write is not inhibited ........................................... 66
Figure 27.
Write mode sequences when write is inhibited ............................................. 66
Figure 28.
Write cycle polling flowchart using ACK .................................................. 67
Figure 29.
Read mode sequences ............................................................. 69
Figure 30.
I2C Present Password Sequence ...................................................... 70
Figure 31.
I2C Write Password Sequence ........................................................ 71
Figure 32.
ST25DVxxx protocol timing .......................................................... 73
Figure 33.
ST25DVxxx state transition diagram .................................................... 74
Figure 34.
Stay Quiet frame exchange between VCD and ST25DVxxx .................................... 83
Figure 35.
Read Single Block frame exchange between VCD and ST25DVxxx............................... 84
Figure 36.
Extended Read Single Block frame exchange between VCD and ST25DVxxx ....................... 85
Figure 37.
Write Single Block frame exchange between VCD and ST25DVxxx ............................... 86
Figure 38.
Extended Write Single frame exchange between VCD and ST25DVxxx ............................ 88
Figure 39.
Lock Block frame exchange between VCD and ST25DVxxx .................................... 89
Figure 40.
Extended Lock block frame exchange between VCD and ST25DVxxx ............................. 90
Figure 41.
Read Multiple Block frame exchange between VCD and ST25DVxxx ............................. 91
Figure 42.
Extended Read Multiple Block frame exchange between VCD and ST25DVxxx ...................... 93
Figure 43.
Write Multiple Block frame exchange between VCD and ST25DVxxx.............................. 94
Figure 44.
Extended Write Multiple Block frame exchange between VCD and ST25DVxxx ...................... 96
Figure 45.
Select frame exchange between VCD and ST25DVxxx ....................................... 97
Figure 46.
Reset to Ready frame exchange between VCD and ST25DVxxx................................. 98
Figure 47.
Write AFI frame exchange between VCD and ST25DVxxx .................................... 100
Figure 48.
Lock AFI frame exchange between VCD and ST25DVxxx .................................... 101
Figure 49.
Write DSFID frame exchange between VCD and ST25DVxxx.................................. 102
Figure 50.
Lock DSFID frame exchange between VCD and ST25DVxxx .................................. 103
Figure 51.
Get System Info frame exchange between VCD and ST25DVxxx ............................... 105
Figure 52.
Extended Get System Info frame exchange between VCD and ST25DVxxx ........................ 108
ST25DV04K ST25DV16K ST25DV64K
List of figures
DS10925 - Rev 11
page 195/197



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