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STM32C011F6P3TR Scheda tecnica(PDF) 78 Page - STMicroelectronics

Il numero della parte STM32C011F6P3TR
Spiegazioni elettronici  Arm® Cortex®-M0 32-bit MCU, 32 KB Flash, 6 KB RAM,2 x USART, timers, ADC, comm. I/Fs, 2-3.6 V
PDF  94 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32C011F6P3TR Scheda tecnica(HTML) 78 Page - STMicroelectronics

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Electrical characteristics
STM32C011x4/x6
78/94
DS13866 Rev 3
1. Measurement points are done at CMOS levels: 0.3 VDDIO1 and 0.7 VDDIO1.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
Figure 26. I2S master timing diagram (Philips protocol)
1. Evaluated by characterization – Not tested in production.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
USART characteristics
Unless otherwise specified, the parameters given in Table 63 for USART are derived from
tests performed under the ambient temperature, fPCLKx frequency and supply voltage
conditions summarized in Table 23: General operating conditions. The additional general
conditions are:
•
OSPEEDRy[1:0] set to 10 (output speed)
•
capacitive load C = 30 pF
•
measurement points at CMOS levels: 0.5 x VDD
Refer to Section 5.3.13: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, CK, TX, and RX for USART).
MSv39720V1
CPOL = 0
CPOL = 1
tc(CK)
WS output
SDreceive
SDtransmit
tw(CKH)
tw(CKL)
tsu(SD_MR)
tv(SD_MT)
th(SD_MT)
th(WS)
th(SD_MR)
MSB receive
Bitn receive
LSB receive
MSB transmit
Bitn transmit
LSB transmit
tf(CK)
tr(CK)
tv(WS)
LSB receive(2)
LSB transmit(2)
10%
90%



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