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STM8AF6366ITD Scheda tecnica(PDF) 68 Page - STMicroelectronics |
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STM8AF6366ITD Scheda tecnica(HTML) 68 Page - STMicroelectronics |
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68 / 95 page ![]() Electrical characteristics STM8AF6366 68/95 DS12343 Rev 2 Figure 34. Typical NRST pull-up resistance RPU vs VDD Figure 35. Typical NRST pull-up current Ipu vs VDD The reset network shown in Figure 36 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below VIL(NRST) max (see Table 36: NRST pin characteristics ), otherwise the reset is not taken into account internally. Figure 36. Recommended reset pin protection 30 35 40 45 50 55 60 2.5 3 3.5 4 4.5 5 5.5 6 V DD [V] -40°C 25°C 85°C 125°C 0 20 40 60 80 100 120 140 01 2 3 4 5 6 V DD [V] -40°C 25°C 85°C 125°C MSv38341V1 External reset circuit 0.1 μF NRST Filter STM8A (Optional) VDD RPU Internal reset |
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