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SN250Q Scheda tecnica(PDF) 86 Page - STMicroelectronics |
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SN250Q Scheda tecnica(HTML) 86 Page - STMicroelectronics |
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86 / 130 page ![]() Functional description—application modules SN250 86/130 SC2_TXENDB [0x440E] SC2_RXERRA [0x441A] SC2_RXERRB [0x441C] 15 0-R 14 1-R 13 1-R 12 0-RW 11 0-RW 10 0-RW 9 0-RW 8 0-RW 0 1 1 SC2_TXENDB SC2_TXENDB 0-RW 7 0-RW 6 0-RW 5 0-RW 4 0-RW 3 0-RW 2 0-RW 1 0-RW 0 SC2_TXENDB [12:0] DMA End address (byte aligned) for transmit buffer B. 5 5 5 5 5 5 5 5 6&B5;(55$ 6&B5;(55$ 5 5 5 5 5 5 5 5 SC2_RXERRA [12:0] A byte offset (from 0) which points to the location of the first error in the DMA receive buffer A. If there is no error, it will hold the value zero. This register will not be updated by subsequent errors arriving in the DMA. The next error will only be recorded if the buffer unloads and is reloaded or the receive DMA is reset. 15 0-R 14 0-R 13 0-R 12 0-R 11 0-R 10 0-R 9 0-R 8 0-R 0 0 0 SC2_RXERRB SC2_RXERRB 0-R 7 0-R 6 0-R 5 0-R 4 0-R 3 0-R 2 0-R 1 0-R 0 SC2_RXERRB [12:0] A byte offset (from 0) which points to the location of the first error in the DMA receive buffer B. If there is no error, it will hold the value zero. This register will not be updated by subsequent errors arriving in the DMA. The next error will only be recorded if the buffer unloads and is reloaded or the receive DMA is reset. |
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