ADN2530YCPZ-R2 datasheet(11/20 Pages) AD

11 / 20 page

ADN2530

Rev. A | Page 11 of 20

The equivalent circuits of the BSET, IBIAS, and IBMON pins

are shown in Figure 25 to Figure 27.

VCC

BSET

VCC

800

200

Figure 25. Equivalent Circuit of the BSET Pin

100

IBIAS

VCC

Figure 26. Equivalent Circuit of the IBIAS Pin

VCC

IBMON

VCC

100

500

VCC

Figure 27. Equivalent Circuit of the IBMON Pin

The recommended configuration for BSET, IBIAS, and IBMON

is shown in Figure 28.

ADN2530

BSET

VBSET

GND

IBMON

IBIAS

TO LASER CATHODE

RIBMON

750

IBIAS

Figure 28. Recommended Configuration for BSET, IBIAS, and IBMON Pins

The circuit used to drive the BSET voltage must be able to drive

the 1 kΩ input resistance of the BSET pin. For proper operation

of the bias current source, the voltage at the IBIAS pin must be

between the compliance voltage specifications for this pin over

supply, temperature, and bias current range (see Table 1). The

maximum compliance voltage is specified for only two bias

current levels (2 mA and 25 mA), but it can be calculated for

any bias current by

VCOMPLIANCE (V) = VCC (V) − 0.75 − 22 × IBIAS (A)

See the Headroom Calculations section for examples.

The function of Inductor L is to isolate the capacitance of the

IBIAS output from the high frequency signal path. For

recommended components, see Table 6.

AUTOMATIC LASER SHUTDOWN (ALS)

The ALS pin is a digital input that enables/disables both the bias

and modulation currents, depending on the logic state applied,

as shown in Table 5.

Table 5.

ALS Logic State

IBIAS and IMOD

High

Disabled

Low

Enabled

Floating

Enabled

The ALS pin is compatible with 3.3 V CMOS and TTL logic

levels. Its equivalent circuit is shown in Figure 29.

VCC

ALS

VCC

100

35k

Figure 29. Equivalent Circuit of the ALS Pin

MODULATION CURRENT

The modulation current can be controlled by applying a dc

voltage to the MSET pin. This voltage is converted into a dc

current by using a voltage-to-current converter that uses an

operational amplifier and a bipolar transistor, as shown in

Figure 30.

100Ω

200Ω

800Ω

MSET

GND

IMODP

IMODN

ADN2530

VCC

FROM CPA STAGE

IMOD

Figure 30. Generation of Modulation Current on the ADN2530

This dc current is switched by the data signal applied to the

input stage (DATAP and DATAN pins) and gained up by the

output stage to generate the differential modulation current at

the IMODP and IMODN pins. The output stage also generates

the active back-termination, which provides proper transmission

line termination. Active back-termination uses feedback around

an active circuit to synthesize a broadband termination resistance.

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