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HC705E5GRS/D Scheda tecnica(PDF) 59 Page - NXP Semiconductors |
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HC705E5GRS/D Scheda tecnica(HTML) 59 Page - NXP Semiconductors |
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59 / 148 page ![]() Timer Timer Counter Register MC68HC705E5 — Rev. 1.0 General Release Specification Timer 8.4 Timer Counter Register The timer counter register (TCR) is a read-only register which contains the current value of the 8-bit ripple counter at the beginning of the timer chain. This counter is clocked at fop divided by four and can be used for various functions including a software input capture. Extended time periods can be attained using the TOF function to increment a temporary RAM storage location, thereby simulating a 16-bit (or more) counter. The power-on cycle clears the entire counter chain and begins clocking the counter. After 4064 cycles, the power-on reset circuit is released, which again clears the counter chain and allows the device to come out of reset. At this point, if RESET is not asserted, the timer will start counting up from zero and normal device operation will begin. When RESET is asserted any time during operation other than POR, the counter chain will be cleared. Address: $0009 Bit 7 654321 Bit 0 Read: Write: Reset: 00000011 = Unimplemented Figure 8-3. Timer Counter Register (TCR) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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