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CS5320 Scheda tecnica(PDF) 36 Page - Applied Micro Circuits Corporation |
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CS5320 Scheda tecnica(HTML) 36 Page - Applied Micro Circuits Corporation |
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36 / 160 page  S5320 – PCI Match Maker: PCI Configuration Registers 36 DS1656 AMCC Confidential and Proprietary Revision 5.03 – June 14, 2006 Data Sheet Class Code Register (CLCD) This 24-bit, read-only register is divided into three one- byte fields: the base class byte at location 0Bh, the sub-class byte at 0Ah, and the programming interface byte at 09h. The default setting for the base class is FFh, which indicates that the device does not fit into the thirteen base classes defined in the PCI Bus Spec- ification. It is possible, however, through use of the external non-volatile memory to change the value of this register. Refer to the PCI specification for details. Figure 11. Class Code Register Register Name: Class Code Address Offset: 09h-0Bh Power-up value: FF0000h Boot-load: External nvRAM offset 049h-4Bh Attribute: Read Only Size: 24 Bits 0 7 Base Class Sub-Class Prog I/F 0 7 07 @0Bh @0Ah @09h |
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