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85356AMILF Scheda tecnica(PDF) 2 Page - Renesas Technology Corp |
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85356AMILF Scheda tecnica(HTML) 2 Page - Renesas Technology Corp |
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2 / 16 page ![]() Rev C 1/5/15 2 2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL/ECL CLOCK MULTIPLEXER 85356 DATA SHEET Table 1. Pin Descriptions NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Function Tables Table 3. Control Input Function Table Number Name Type Description 14, 20 VCC Power Positive supply pins. 1 CLK0A Input Pulldown Non-inverting differential clock input. 2 nCLK0A Input Pullup Inverting differential clock input. 3, 8 nc Unused No connect. 4 CLK0B Input Pulldown Non-inverting differential clock input. 5 nCLK0B Input Pullup Inverting differential clock input. 6 CLK1A Input Pulldown Non-inverting differential clock input. 7 nCLK1A Input Pullup Inverting differential clock input. 9 CLK1B Input Pulldown Non-inverting differential clock input. 10 nCLK1B Input Pullup Inverting differential clock input. 11 VEE Power Negative supply pin. 12, 13 nQ1,Q1 Output Differential output pair. LVPECL interface levels. 15, 17 SEL1, SEL0 Input Pullup Clock select inputs. LVCMOS/LVTTL interface levels. 16 COM_SEL Input Pulldown Common select input. LVCMOS/LVTTL interface levels. 18, 19 nQ0,Q0 Output Differential output pair. LVPECL interface levels. Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 4 pF RPULLUP Input Pullup Resistor 51 k RPULLDOWN Input Pulldown Resistor 51 k Inputs Outputs COM_SEL SEL1 SEL0 Q0 nQ0 Q1 nQ1 0 0 0 CLK0A nCLK0A CLK1A nCLK1A 0 0 1 CLK0B nCLK0B CLK1A nCLK1A 0 1 0 CLK0A nCLK0A CLK1B nCLK1B 0 1 1 CLK0B nCLK0B CLK1B nCLK1B 1 x x CLK0B nCLK0B CLK1B nCLK1B |
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