ADC1113S125 datasheet(7/36 Pages) RENESAS

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ADC1113S125 2

Product data sheet

Rev. 02 — 2 July 2012

7 of 36

Integrated Device Technology

ADC1113S125

Single 11-bit ADC; serial JESD204A interface

Voltage controlled regulator output: pin VCM

VO(cm)

common-mode output

voltage

-0.5VDDA

-V

IO(cm)

common-mode output

current

-4

Reference voltage input/output: pin VREF

VVREF

voltage on pin VREF

output

0.5

input

0.5

Data outputs: pins CMLP, CMLN

Output levels, VDDD(1V8) = 1.8 V; SWING_SEL[2:0] = 000

VOL

LOW-level output

voltage

DC-coupled; output

1.5

AC-coupled

1.35

VOH

HIGH-level output

voltage

DC-coupled; output

1.8

AC-coupled

1.65

Output levels, VDDD(1V8) = 1.8 V; SWING_SEL[2:0] = 001

VOL

LOW-level output

voltage

DC-coupled; output

1.45

AC-coupled

1.275

VOH

HIGH-level output

voltage

DC-coupled; output

1.8

AC-coupled

1.625

Output levels, VDDD(1V8) = 1.8 V; SWING_SEL[2:0] = 010

VOL

LOW-level output

voltage

DC-coupled; output

1.4

AC-coupled

1.2

VOH

HIGH-level output

voltage

DC-coupled; output

1.8

AC-coupled

1.6

Output levels, VDDD(1V8) = 1.8 V; SWING_SEL[2:0] = 011

VOL

LOW-level output

voltage

DC-coupled; output

1.35

AC-coupled

1.125

VOH

HIGH-level output

voltage

DC-coupled; output

1.8

AC-coupled

1.575

Output levels, VDDD(1V8) = 1.8 V; SWING_SEL[2:0] = 100

VOL

LOW-level output

voltage

DC-coupled; output

1.3

AC-coupled

1.05

VOH

HIGH-level output

voltage

DC-coupled; output

1.8

AC-coupled

1.55

Serial configuration: pins SYNCP, SYNCN

VIL

LOW-level input voltage differential; input

0.95

VIH

HIGH-level input voltage differential; input

1.47

Accuracy

INL

integral non-linearity

5-

LSB

DNL

differential non-linearity

guaranteed no missing

codes

0.95

0.5

+0.95

LSB

Eoffset

offset error

2-

Table 5.

Static characteristics[1] …continued

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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