ADC1113S125 2

© IDT 2012. All rights reserved.

Product data sheet

Rev. 02 — 2 July 2012

9 of 36

Integrated Device Technology

ADC1113S125

Single 11-bit ADC; serial JESD204A interface

[1]

Typical values measured at VDDA =3 V, VDDD(1V8) =1.8 V, Tamb =25 C. Minimum and maximum values are across the full temperature

range Tamb = 40 C to +85 C at VDDA =3 V, VDDD(1V8) = 1.8 V; Vi(INP)  Vi(INM) = 1 dBFS; internal reference mode; 100  differential

applied to serial outputs; unless otherwise specified.

10.2 Clock and digital output timing

[1]

Typical values measured at VDDA =3 V, VDDD(1V8) =1.8 V, Tamb =25 C. Minimum and maximum values are across the full temperature

range Tamb = 40 C to +85 C at VDDA =3 V, VDDD(1V8) = 1.8 V; Vi(INP)  Vi(INM) = 1 dBFS; internal reference mode; 100  differential

applied to serial outputs; unless otherwise specified.

IMD

intermodulation distortion

fi =3MHz

-

89

-

dBc

fi =30MHz

-

88

-

dBc

fi =70MHz

-

86

-

dBc

fi =170 MHz

-

84

-

dBc

ct(ch)

channel crosstalk

fi =70MHz

-

100

-

dBc

Table 6.

Dynamic characteristics[1] …continued

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 7.

Clock and digital output characteristics[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

pins CLKP and CLKM

fclk

clock frequency

100

-

125

Msps

tlat(data)

data latency time

clock cycles

160

-

170

ns

clk

clock duty cycle

DCS_EN = logic 1

30

50

70

%

td(s)

sampling delay time

-

0.8

-

ns

twake

wake-up time

-

76

-

s