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MPC850 Scheda tecnica(PDF) 41 Page - Freescale Semiconductor, Inc |
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MPC850 Scheda tecnica(HTML) 41 Page - Freescale Semiconductor, Inc |
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41 / 72 page  MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 41 CPM Electrical Characteristics Figure 37. Boundary Scan (JTAG) Timing Diagram 8 CPM Electrical Characteristics This section provides the AC and DC electrical specifications for the communications processor module (CPM) of the MPC850. 8.1 PIO AC Electrical Specifications Table 13 provides the parallel I/O timings for the MPC850 as shown in Figure 38. Table 13. Parallel I/O Timing Num Characteristic All Frequencies Unit Min Max 29 Data-in setup time to clock high 15 — ns 30 Data-in hold time from clock high 7.5 — ns 31 Clock low to data-out valid (CPU writes data, control, or direction) — 25 ns TCK Output Signals Output Signals Input Signals J92 J94 J93 J95 J96 |
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