MP8830 datasheet(5/20 Pages) EXAR

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MP8830

Rev. 1.00

Parameter

Test Conditions/Comments

Units

Max

Typ

Min

Symbol

Offset DAC

Resolution

Bits

Differential Non-Linearity

DNL

–0.5

0.5

LSB

Integral Non-Linearity

INL

LSB

VRB Range

ZSR

152

158

164

This is measured as the voltage difference at

the clamp pin of the selected channel when

the offset DAC changed from 000 (hex) to 3F

(hex) with the gain DAC at 1FF (hex). Refer

to VRT and VRB EQNs in the theory of opera-

tion section.

Maximum Offset Change per Cycle2

MOC

100

% FSR

After the specified maximum change in offset

DAC setting, the ADC should output the same

code

1 LSB for all of the following conver-

sions assuming the analog input remains

fixed, i.e. DC.

Full Scale Settling Time2

ts-od

200

For a 00 (hex) to 3F (hex) change of offset

DAC code.

Black Level Clamp Switch

On Resistance

RON

100

150

Ω

Effective RIN at clamp pin.

Input Leakage

ILCLP

Offset DAC at 00 (hex) (worst case condition).

Clamp Switching Charge Injection2

QCLP

Offset DAC at 00 (hex) (worst case condition).

Voltage at Clamp Pin

VCLP

170

180

190

Offset by 4 LSB from bottom tap of ADC lad-

der. Gain = 000 (H). Offset DAC = 00.

Reference Voltage Requirements (See Theory of Operation)

Reference Voltage

VREF

0.93

1.07

All linearity specifications assume the refer-

ence voltage = AVDD X ( 0.2 ).

0.5

1.15

Functional.

Calibration Voltage

VCAL

AGND

AVDD V

Sense Pins Input Resistance

(ASENS, BSENS, CSENS)

RINS

560

Ω

RINS is measured from the sense pin to

AGND2, BGND2, CGND2 with the power

turned off and test voltage less than 250 mV.

Power Supplies (Note: All GND pins are substrate)

Analog Positive Supply

AVDD

4.75

5.25

Bypass power supply pins.

Digital Positive Supply

DVDD

AVDD

AVDD V

Bypass power supply pins.

Analog Negative Supply

AGND

Digital Negative Supply

DGND

Power Supply Rejection

PSRR

–60

f=1 KHz.

Supply Current

IDD

100

130

During specified operation.

Digital Characteristics

Digital Input High Voltage for Control

Pins

VIH

3.5

All digital input pins other than DAC data

inputs.

Digital Input Low Voltage for Control

Pins

VIL

1.5

All digital input pins other than DAC data

inputs.

Digital Input High Voltage for DAC

Input Pins

VIH

2.4

DAC data inputs, CD0-CD14

Digital Input Low Voltage for DAC

Input Pins

VIL

0.4

DAC data inputs, CD0-CD14

VOL

0.5

@ IOL = 4 mA

VOH

4.5

@ IOH = 4 mA

Digital Input Leakage Current

IIN

–10

µA

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