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MP8830 Scheda tecnica(PDF) 7 Page - Exar Corporation |
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MP8830 Scheda tecnica(HTML) 7 Page - Exar Corporation |
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7 / 20 page ![]() MP8830 7 Rev. 1.00 ABSOLUTE MAXIMUM RATINGS (TA = +25 °C unless otherwise noted) 1, 2 AVDD to GND 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DVDD to GND 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AVDD – DVDD 150 mV DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . All Inputs VDD +0.5 to GND –0.5 V . . . . . . . . . . . . . . . . . . . . . Storage Temperature –65 °C to 150°C . . . . . . . . . . . . . . . . . . Lead Temperature 300 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD Rating 2000 V on all pins. . . . . . . . . . . . . . . . . . . . . . . . . . Package Power Dissipation Rating @ 75 °C PQFP 1100 mW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Derates above 75 °C 15 mW/ °C . . . . . . . . . . . . . . . . . . . . . TJMAX 150 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOTES: 1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All logic inputs have protection diodes which will protect the device from short transients outside the supplies of less than 100mA for less than 100 µs. TRUTH TABLE Function CVL AENL BENL CENL CREN RNW VINMX FAST DCL Start AIN tracking ↑ 1 1 1 0 X 0 X X Sample AIN 1 ↑ 1 1 0 X 0 X X MSB convert 0 1 0 1 0 X 0 X X LSB convert 0 1 1 0 0 X 0 X X Output A ADC data from previous sample ↑ 1 1 1 0 X 0 X X Output B ADC data from previous sample X 1 ↓ 1 0 X 0 X X Output C ADC data from previous sample X 1 1 ↓ 0 X 0 X X Load channel A data to first A DAC register X ↓ 1 1 0 X 0 X X Load channel B data to first B DAC register X 1 ↓ 1 0 X 0 X X Load channel C data to first C DAC register X 1 1 ↓ 0 X 0 X X Update second register for all DACs ↑ 1 1 1 0 X 0 X X Turn on all black level clamp switches X X X X X X X X 0 Pass-through mode: ADC port in, DAC port out X X X X 1 0 X X X Pass-through mode: DAC port in, ADC port out X X X X 1 1 X X X ADC inputs connect to VCAL X X X X X X 1 X X Put ADCs in 4-bit mode X X X X X X X 1 X |
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