Data Sheet

ADL8100

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

analog.com

Rev. 0 | 6 of 27

Figure 2. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RFIN

RF Input. The RFIN pin is DC-coupled and matched to 50 Ω. See Figure 3 for the interface schematic.

2, 6

GND

Ground. Connect the GND pins to a ground plane that has low electrical and thermal impedance. See Figure 4 for the interface schematic.

3

RBIAS

Bias Setting Resistor. Connect a resistor between RBIAS and VDD to set the IDQ. See Figure 105 and Table 9 for more details. See Figure 5

for the interface schematic.

4, 7, 8

NIC

Not Internally Connected. These pins are not connected internally. For normal operation, connect the pins to a ground plane that has low

electrical and thermal impedance.

5

RFOUT/VDD

RF Output/Drain Bias Voltage. The RF output is DC-coupled and also serves as the drain biasing node. For the drain bias voltage, connect a

DC bias network to provide the drain current and AC-couple the RF output path (see the Figure 105 for more information). See Figure 6 for the

interface schematic.

EXPOSED

PADDLE

Exposed Ground Paddle. Connect the exposed paddle to a ground plane that has low electrical and thermal impedance.

INTERFACE SCHEMATICS

Figure 3. RFIN Interface Schematic

Figure 4. GND Interface Schematic

Figure 5. RBIAS Interface Schematic

Figure 6. RFOUT/VDD Interface Schematic