HD404828RFS datasheet(85/149 Pages) RENESAS

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HD404829R Series

÷2

÷8

÷32

÷128

÷512

÷2048

Data bus

Clock line

Signal line

Serial mode

(SMRB)

SCK

øPER

Idle controll

logic

Serial mode

(SMRA)

Clock

Serial data

Serial interrupt

request flag

(IFS)

1/2

System

clock

Octal

counter (OC)

I/O controll

logic

Transfer

control

Figure 70 Block Diagram of Serial Interface

Serial Interface Operation

Selecting and Changing the Operating Mode: table 22 lists the serial interface’s operating modes. To

select an operating mode, use one of these combinations of port mode register A (PMRA: $004) and serial

mode register A (SMRA: $005) settings; to change the operating mode, always initialize the serial interface

internally by writing data to serial mode register A. Note that the serial interface is initialized by writing

data to serial mode register A. Refer to the following Serial Mode Register A section for details.

Pin Setting: The R21/SCK pin is controlled by writing data to serial mode register A (SMRA: $005). The

R22/SI and R23/SO pins are controlled by writing data to port mode register A (PMRA: $004). Refer to the

following Registers for Serial Interface section for details.

Transmit Clock Source Setting: The transmit clock source is set by writing data to serial mode register A

(SMRA: $005) and serial mode register B (SMRB: $028). Refer to the following Registers for Serial

Interface section for details.

Data Setting: Transmit data is set by writing data to the serial data register (SRL: $006, SRU: $007).

Receive data is obtained by reading the contents of the serial data register. The serial data is shifted by the

transmit clock and is input from or output to an external system.

The output level of the SO pin is invalid until the first data is output after MCU reset, or until the output

level control in idle states is performed.

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