Production Data

WM8152

w

PD Rev 4.0 January 2004

7

Test Conditions

°C, MCLK = 24MHz unless otherwise stated.

PARAMETER

SYMBOL

TEST

CONDITIONS

MIN

TYP

MAX

UNIT

Programmable Gain Amplifier

Resolution

8

bits

Gain equation

255

7.57

0]

:

PGA[7

0.78

×

+

V/V

Max gain

6.8

8.35

8.7

V/V

Min gain

0.75

0.78

0.82

V/V

Gain error

1

2

%

Internal channel offset

10

mV

Analogue to Digital Converter

Resolution

16

bits

Maximum Speed

12

MSPS

Full-scale input range

(2*(VRT-VRB))

2.5

V

DIGITAL SPECIFICATIONS

Digital Inputs

High level input voltage

0.7

∗ DVDD2

V

Low level input voltage

0.2

∗ DVDD2

V

High level input current

1

µA

Low level input current

1

µA

Input capacitance

5

pF

Digital Outputs

High level output voltage

DVDD2 - 0.5

V

Low level output voltage

0.5

V

Supply Currents

Total supply current

− active

45

mA

Total analogue AVDD, supply

current

− active

41

mA

Total digital core, DVDD1,

supply current

− active

3

mA

Digital I/O supply current,

DVDD2

− active (see note 3)

3

mA

Supply current

− full power down

mode

300

400

µA

Notes:

3.

Digital I/O supply current depends on the capacitive load attached to the pin. The Digital I/O supply current is

measured with approximately 50pF attached to the pin.