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MP3326 Scheda tecnica(PDF) 13 Page - Monolithic Power Systems |
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MP3326 Scheda tecnica(HTML) 13 Page - Monolithic Power Systems |
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13 / 36 page ![]() MP3326 – 16-CHANNEL LED DRIVER WITH I2C AND SEPARATED PDIM/ADIM MP3326 Rev. 1.0 www.MonolithicPower.com 13 1/4/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. Table 1: RFSH/FLT Pin Output Status FLTEN RFSH/FLT Pin Output FRFSH = 0x000 FRFSH = 0x001~0x3FF No fault condition Fault condition No fault condition Fault condition 1 Externally pulled high Low Rectangle signal Low 0 Externally pulled high Rectangle signal The refresh signal frequency is set by FRFSH 9:0. If FRFSH 9:0 = 0x000, then the RFSH/FLT pin outputs high. If FRFSH 9:0 = 0x001 to 0x3FF, then the RFSH/FLT pin outputs a rectangle signal, and the refresh frequency can be calculated with Equation (3): REFRESH 127500 f= FRFSH9 : 0 (3) Note that if FPWM1:0 = 01, the PWM dimming frequency is 250Hz. If RFSH 9:0 = 0x000, the RFSH/FLT pin outputs high. The refresh frequency is also related to the PWM dimming frequency, estimated with Equation (4): PWM REFRESH 127500 f f = (Hz) FRFSH 250 (4) Where fREFRESH is the refresh frequency, FRFSH is the value of register FRFSH 9:0, and fPWM is PWM dimming frequency set by register FPWM1:0 (it can be either 200Hz, 250Hz, 280Hz, or 330Hz). For this equation, FRFSH9:0 > 0. Note that all numbers in the equation have a decimal base, and that the refresh frequency does not change until the 8MSB are written. The internal oscillator is divided by 8. As the clock refreshes the frequency generation, the FRFSH register sets the counter number (see Figure 5). OSC OSC = 1.02 MHz Default 1/8 Counter I 2C FRFSH 9:0 MP3326 FPWM 1:0 250Hz Default RFSH/ FLT SDA SCL Figure 5: Refresh Frequency Generation LED Current Slew Rate Control Changing the LED current ’s rising/falling slew rate in PWM dimming can optimize EMI performance. The LED current rising/falling slew rate is controlled by the SLEW register, bits[1:0], and can be set to the values listed below: SLEW1:0 = 00, no slew rate SLEW1:0 = 01, 5µs SLEW1:0 = 10, 10µs SLEW1:0 = 11, 20µs Protection The MP3326 employs VIN under-voltage lockout (UVLO), LED short protection, LED open-load protection, and thermal shutdown. The /FLT pin is active low, open drain, and should be pulled high to an external voltage source. If a protection is triggered, the corresponding fault bit is set, and /FLT is pulled low. In hiccup mode, the /FLT pin is pulled high once the fault condition is removed. In latch-off mode, the /FLT pin is released if all of the fault bits are read. |
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