GL711FW
-3-
Revision: 1.3
09/12/2001
2. Features
Data transfer rates of S100, S200 and S400
Fully interoperable with implementation of IEEE-1394(1995) and IEEE
1394.a-2000 compliant
Standard PHY/link Interface
Firmware support for SBP-2 target agent
Fully ATA/ATAPI-6 compliant.
Supports IDE PIO modes and DMA modes and Ultra DMA modes up to
UDMA100.
Embedded RAM, ROM and micro-processor.
External Flash ROM interface for easy updating firmware code.
Automatic SBP-2 protocol management by an internal hardware engine to improve
performance and firmware efficiency
Auto acknowledge-code response for all packets that targeted to
Management/Command ORB agent SBP-2 protocol engine:
- Automatic Management ORB fetch
- Linked Command ORB fetch
- Auto address increment DMA for both direct and indirect addressing
Automatic Page Table fetching
Dedicated asynchronous data transfer
Automatic packing/de-packing for asynchronous transmit/receive data of DMA
Automatic single-retry protocol and split transaction control.
2 sets of 4-quadlet registers for Asynchronous Receive/Transmit packet header
2 sets of 8-quadlet registers for general Asynchronous Receive/Transmit packet
data block payload
5 sets of 8/8/2/2/2-quadlet registers for Receive packet data block payload
dedicated for SBP-2 requirement (MORB,
CORB, PTE, MOP and COP)
4K bytes of FIFO for bi-directional transmit/receive data
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