GL711FW
-5-
Revision: 1.3
09/12/2001
Functional Overview
The GL711FW is designed to simplify the firmware issue of
µP (8052) and save hardware cost.
Upon the completion of a packet reception, the GL711FW will automatically respond
acknowledge code according to the destination offset and generate the corresponding interrupt
to inform the firmware to check if the received packet meets SBP-2 and 1394 protocol or not.
The data payload dedicated to SBP-2 protocol is moved to the specified registers so that
firmware can easily inquire and reply the data packet according to the received packet if
necessary. The
µP has to do is to set "1394 instruction register" properly and then the internal
SBP-2 engine will automatically collect all fields from SBP-2 registers to generate the data
packet. For the SCSI command that requested from initiator, firmware have to transfer these
commands to ATA/ATAPI commands, and write them to IDE device through I/O register to
access IDE interface. The embedded
µP and internal ROM can be disabled by negating ENUP#
and EA respectively for prototype development or other specific functions.
GL711FW architecture:
1. Asyn Tx registers: general asynchronous packet transmit registers, 4-quadlets for 1394
header and 8-quadlets for data payload. After getting all fields of packet ready, the
firmware can set “AsynTx” instruction to send the packet. Some packets for transmitting
packets like “Login Response”, “Query Login Response” and “Status Block” are prepared
by the registers whose maximum data payload is 8 quadlets.
2. Asyn Rx registers: general asynchronous packet receives registers, 4-quadlets for 1394
header and 8-quadlets for data payload. The received packet other than the SBP-2
associated read response packets, like "Config ROM Read Request" from the initiators, is
stored in the registers. However, all the SBP-2 read response packet received from the
initiators are always expected by the target and forwarded to the Auto Packet Distributor.
3. 1394 Control Registers: control and interrupt registers for IEEE 1394 and SBP-2 protocol,
see the details in the section of 1394 control register.
4. ADP State Machine: Automatic data pipe control for SBP-2 data transfer and page table
fetch.
5. Auto Packet Generator: generate the read or write request packet header of those packets
with standard format like Config ROM read response packet, Management ORB read
request, Command ORB read request, Page Table read request, Block data read request
from or write request to initiator.
6. Auto Packet Distributor: The data payload of SBP-2 associated packet is stored at the
specified registers according to its destination offset, Tlabel or last request packet
command. The received data payload is classified by the GL711FW to 7 types:
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