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STE10A Scheda tecnica(PDF) 76 Page - STMicroelectronics |
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STE10A Scheda tecnica(HTML) 76 Page - STMicroelectronics |
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76 / 82 page ![]() Electrical specifications and timings STE10/100A 76/82 Figure 18. Flash write timings Figure 19. Flash read timings Table 24. EEPROM Interface Timings Symbol Parameter Test condition Min. Typ. Max. Units Tscf Serial clock frequency Tscf - 1.4 µs714 kHz Tecss Delay from CS high to SK high 0.1 1.7 µs Tecsh Delay from SK low to CS low 200 650 ns Tedts Setup time of DI to SK 200 600 ns Tedth Hold time of DI after SK 0 700 ns Tecsl CS low time 0.5 1.1 µs Tfcyc Tfasc Tfah Tfasw Tahw Tfwpw Tfds Tfdh Tfcss Tfcsh Tfwph ADDRESS CS# WE# DATA ADDRESS CS# OE# DATA Tfcyc Tfce Tfoe Tfasd Tfdf |
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