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ADRF5700BCCZN-R7 Scheda tecnica(PDF) 13 Page - Analog Devices

Il numero della parte ADRF5700BCCZN-R7
Spiegazioni elettronici  46 dB, 2 dB LSB, 5-Bit, Silicon Digital Attenuator, 100 MHz to 22 GHz
PDF  16 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADRF5700BCCZN-R7 Scheda tecnica(HTML) 13 Page - Analog Devices

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Data Sheet
ADRF5700
THEORY OF OPERATION
analog.com
Rev. 0 | 13 of 16
The ADRF5700 incorporates a 5-bit fixed attenuator array that
offers an attenuation range of 46 dB in 2 dB steps. An integrated
driver provides parallel mode control of the attenuator array.
The ADRF5700 has five digital control inputs, D2 (LSB) to D6
(MSB), to select the desired attenuation state in parallel mode, as
shown in Figure 23. Internally, there are two 16 dB stages, and
these stages can be controlled by the D5 and D6 pins.
POWER SUPPLY
The ADRF5700 requires a positive supply voltage applied to the
VDD pin and a negative supply voltage applied to the VSS pin.
Bypassing capacitors are recommended on the supply lines to filter
high frequency noise.
The power-up sequence is as follows:
1. Connect GND.
2. Power up the VDD and VSS voltages. Power up VSS after VDD
to avoid current transients on VDD during ramp-up.
3. Power up the digital control inputs. The order of the digital
control inputs is not important. However, powering the digital
control inputs before the VDD voltage supply can inadvertently
forward bias and damage the internal ESD structures. To avoid
this damage, use a series 1 kΩ resistor to limit the current
flowing into the control pin.
4. Apply an RF input signal to ATTIN or ATTOUT.
The power-down sequence is the reverse order of the power-up
sequence.
Power-Up State
The ADRF5700 has an internal pull-up resistor (see Figure 6).
The internal pull-up resistor sets the attenuator to the maximum
attenuation state (46 dB) when the VDD and VSS voltages are
applied if D2 to D6 are left floating.
Single-Supply Operation
The ADRF5700 can operate with a single positive supply voltage
applied to the VDD pin and the VSS pin connected to ground.
However, some performance difference can occur in the switching
characteristics and large signal (see the Electrical Specifications
section for further information).
RF INPUT AND OUTPUT
Both RF ports (ATTIN and ATTOUT) are DC-coupled to 0 V. No DC
blocking is required at the RF ports when the RF line potential is
equal to 0 V.
The RF ports are internally matched to 50 Ω. Therefore, external
matching components are not required.
The ADRF5700 supports bidirectional operation with equal power
handling capability. Refer to the RF input power specifications in
Table 1.
Table 8. Truth Table
Digital Control Input1
Attenuation State (dB)
D62
D52
D4
D3
D2
Low
Low
Low
Low
Low
0 (reference)
Low
Low
Low
Low
High
2
Low
Low
Low
High
Low
4
Low
Low
High
Low
Low
8
Low
High
Low
Low
Low
16 (D5)
High
Low
Low
Low
Low
16 (D6)
High
High
High
High
High
46
1 Any combination of the VCTRL input states provides an attenuation equal to the sum of the bits selected.
2 D5 and D6 both correspond to the 16 dB state. D5 has slightly better state accuracy at higher frequencies.
Figure 23. Simplified Circuit Diagram



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