Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

SL2S3003 Scheda tecnica(PDF) 17 Page - NXP Semiconductors

Il numero della parte SL2S3003
Spiegazioni elettronici  ICODE 3 (TagTamper)
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

SL2S3003 Scheda tecnica(HTML) 17 Page - NXP Semiconductors

Back Button SL2S3003 Datasheet HTML 13Page - NXP Semiconductors SL2S3003 Datasheet HTML 14Page - NXP Semiconductors SL2S3003 Datasheet HTML 15Page - NXP Semiconductors SL2S3003 Datasheet HTML 16Page - NXP Semiconductors SL2S3003 Datasheet HTML 17Page - NXP Semiconductors SL2S3003 Datasheet HTML 18Page - NXP Semiconductors SL2S3003 Datasheet HTML 19Page - NXP Semiconductors SL2S3003 Datasheet HTML 20Page - NXP Semiconductors SL2S3003 Datasheet HTML 21Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 82 page
background image
NXP Semiconductors
SL2S3003/SL2S3003TT
ICODE 3 (TagTamper)
Field
Bit
Values at
Delivery
Description
PPC_PTNR
8
0b
The Protection Pointer Address defines the base address for the password
protection of the higher user memory segment Page H. All block addresses
smaller than the protection pointer address are in the user memory segment Page
L. Section 8.5.3.6
Table 10. PPC_PNTR byte (Protect Page Pointer Address) configuration parameter descriptions
Bit number
0
1
2
3
4
5
6
7
RL
WL
RFU
RH
WH
RFU
Table 11. PPC_CTRL byte (Protect Page Control)
Field
Bit
Values at
Delivery
Description
RL
1
0b
Defines read password protection for Page L as defined with Section 8.5.3.6
WL
1
0b
Defines write password protection for Page L as defined with Section 8.5.3.6
RH
1
0b
Defines read password protection for Page H as defined with Section 8.5.3.6
WH
1
0b
Defines write password protection for Page H as defined with Section 8.5.3.6
Table 12. PPC_CTRL byte configuration parameter descriptions
Field
Bit
Values at
Delivery
Description
LP_PTNR
8
0b
The Lock Pointer Address defines the block from which the user memory
is divided into two pages (Page L and Page H) for the write lock (see in
Section 8.5.2.3). All block addresses smaller than the Lock Pointer Address are in
the user memory segment Page L. The lock conditions for those two pages L and
H are defined with the settings in the LP_CTR byte (see in Table 14).
Table 13. LP_PNTR byte (Lock Protection Pointer Address) configuration parameter descriptions
SL2S3003/SL2S3003TT
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 3.0 — 28 March 2024
17 / 82



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com