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SL2S3003 Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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SL2S3003 Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
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10 / 82 page  NXP Semiconductors SL2S3003/SL2S3003TT ICODE 3 (TagTamper) Parameter Value Height uniformity within a die ±2 μm within a wafer ±3 μm wafer to wafer ±4 μm Bump flatness ±1.5 μm Bump size LA, LB 80 μm × 80 μm TEST, GND 80 μm × 80 μm variation ±5 μm Under bump metallization sputtered TiW Table 3. Wafer specification...continued 7.1.1 Fail die identification No ink dots are applied to the wafer. Electronic wafer mapping (SECS II format) covers the electrical test results and additionally the results of mechanical/visual inspection. See [5]. 7.1.2 Map file distribution See [5]. SL2S3003/SL2S3003TT All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 3.0 — 28 March 2024 10 / 82 |
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