33742 datasheet(43/65 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33742

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

MODE CONTROL REGISTER (MCR)

Tables 15 through 17 describes the various Mode Control Registers.

Table 15. Mode Control Register

MCR

R/W

$000b

–

MCTR2

MCTR1

MCTR0

BATFAIL(49)

VDDTEMP

GFAIL

WDRST

Reset Value

–

Reset Condition (Write)(50)

–

POR, RESET

Notes

49.

BATFAIL bit cannot be set by SPI. BATFAIL is set when VSUP falls below 3.0 V.

50.

See Table 13 page 42, for definitions of reset conditions

Table 16. Mode Control Register Control Bits

MCTR

33742S Mode

Description

Enter/Exit Debug

Mode

To enter/exit Debug Mode, refer to detailed description in Debug Mode: Hardware and

Software Debug with the 33742, page 30.

Normal

–

Standby

–

Stop, Watchdog OFF

(51)

–

Stop, Watchdog ON

(51)

–

Sleep (52)

–

Normal

No Watchdog running. Debug Mode.

Standby

Stop

Notes

51.

Watchdog ON or OFF depends on RCR bit D3.

52.

Before entering Sleep mode, BATFAIL bit in MCR must be previously cleared (MCR read operation), and NOSTOP bit in RCR must be

previously set to logic [1].

Table 17. Mode Control Register Status Bits

Name

Logic

Description

BATFAIL

VSUP was not below VBF.

VSUP has been below VBF.

VDDTEMP

No overtemperature pre-warning.

Temperature pre-warning on VDD regulator (bit latched).

GFAIL

No failure.

CAN Failure or HS overtemperature or V2 low.

WDRST

No watchdog reset occurred.

Watchdog reset occurred.

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