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SPSB100 Scheda tecnica(PDF) 125 Page - STMicroelectronics

Il numero della parte SPSB100
Spiegazioni elettronici  Automotive power management IC for highly integrated processors
PDF  214 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPSB100 Scheda tecnica(HTML) 125 Page - STMicroelectronics

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Bit
Name
Description
1111: 31 V
11 FBB_OV_EW_TH_2
10 FBB_OV_EW_TH_1
9
FBB_OV_EW_TH_0
8
FBB_UV_EW_TH_3
FBB undervoltage early warning threshold.
At FBB < FBB_UV_EW_TH, an interrupt is generated on IRQ pin and status bit FBB_UV_EW in
SR4 is set (in active mode)
0000: (default) feature deactivated
0001: 5 V
... (0.25 V step)
1111: 8.5 V
Table 75. DCR3 (0x03) LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
FBB_UV_EW_TH_2
FBB_UV_EW_TH_1
FBB_UV_EW_TH_0
SPI_PROTECT_ACCESS
CRC3
CRC2
CRC1
CRC0
FBB undervoltage
early warning
threshold bit 2
FBB undervoltage
early warning
threshold bit 1
FBB undervoltage
early warning
threshold bit 0
SPI protect access bit
Cyclic
redundancy
checking bit
3
Cyclic
redundancy
checking bit
2
Cyclic
redundancy
checking bit
1
Cyclic
redundancy
checking bit
0
Table 76. DCR3 (0x03) LSB description
Bit
Name
Description
7
FBB_UV_EW_TH_2
6
FBB_UV_EW_TH_1
5
FBB_UV_EW_TH_0
4
SPI_PROTECT_ACCESS
1: Allows write access to protected SPI bits on next write SPI frame
This bit is automatically cleared on the next write SPI frame but can be read high before the
next write SPI frame
0: Access to protected SPI bits is blocked
3
CRC 3
2
CRC 2
1
CRC 1
0
CRC 0
Table 77. DCR4 (0x04) MSB
Bit 23
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
- (R0)
1 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
RES
BOOST_DSMON_TH_2
BOOST_DSMON_TH_1
BOOST_DSMON_TH_0
SWDBG_EXIT
VS_UV_EW_TH_4
VS_UV_EW_TH_3
VS_UV_EW_TH_2
Reserved
BOOST monitor
threshold bit 2
BOOST monitor
threshold bit 1
BOOST monitor
threshold bit 0
Software
debug exit bit
VS undervoltage
early warning
threshold bit 4
VS undervoltage
early warning
threshold bit 3
VS undervoltage
early warning
threshold bit 2
Table 78. DCR4 (0x04) MSB description
Bit
Name
Description
23
RES
Reserved
SPSB100
SPI registers
DS14640 - Rev 1
page 125/214



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