bus. Connections to the bus are made through the SCL

input and open-drain SDA I/O lines. Within the bus

specifications, a standard mode (100kHz maximum

clock rate) and a fast mode (400kHz maximum clock

rate) are defined. The DS1372 works in both modes.

The following bus protocol has been defined (Figure 5):

• Data transfer can be initiated only when the bus is

not busy.

• During data transfer, the data line must remain stable

whenever the clock line is high. Changes in the data

line while the clock line is high are interpreted as

control signals.

_______________________________________________________________________________________

9

SDA

SCL

REPEATED

START

STOP

START

STOP

CONDITION

OR REPEATED

START

CONDITION

REPEATED IF MORE BYTES

ARE TRANSFERED

ACK

START

CONDITION

ACK

ACKNOWLEDGEMENT

SIGNAL FROM RECEIVER

ACKNOWLEDGEMENT

SIGNAL FROM RECEIVER

SLAVE ADDRESS

MSB

SCL

SDA

R/W

DIRECTION

BIT

12

6

7

8

9

1

2

8

9

3–7