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4559 Scheda tecnica(PDF) 14 Page - Renesas Technology Corp |
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4559 Scheda tecnica(HTML) 14 Page - Renesas Technology Corp |
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14 / 148 page ![]() Rev.1.04 Aug 23, 2007 Page 14 of 146 REJ03B0188-0104 4559 Group Fig 8. Port block diagram (6) K23 Ak Ak D T Q FR23 PU3k C3k C3k 01 P30/SEG28, P31/SEG29 (Note 2) K22 Aj Aj D T Q FR22 PU3j C3j C3j 01 P32/SEG30, P33/SEG31 (Note 2) 0 1 0 1 K32 K33 0 1 0 1 K30 K31 Edge detection circuit Key-on wakeup input IAP3 instruction OP3A instruction Register A Pull-up transistor LCD power supply LCD control signal LCD power supply (Note 3) (Note 3) (Note 1) (Note 1) (Note 3) Edge detection circuit (Note 3) Edge detection circuit IAP3 instruction OP3A instruction Register A Pull-up transistor LCD power supply LCD control signal LCD power supply (Note 4) (Note 4) (Note 1) (Note 1) (Note 4) Edge detection circuit (Note 4) Notes 1. This symbol represents a parasitic diode on the port. 2. Applied potential to these ports must be VDD or less. 3. j represents bits 0, 1. 4. k represents bits 2, 3. 5. For setting key-on wakeup of ports P30 and P31 to be invalid (K22 = “0”) set registers K30 and K31 to “0.” 6. For setting key-on wakeup of ports P32 and P33 to be invalid (K23 = “0”) set registers K32 and K33 to “0.” Key-on wakeup input (Note 5) (Note 6) (Note 5) (Note 5) (Note 6) (Note 6) |
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