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LX7220 Scheda tecnica(PDF) 7 Page - Microchip Technology |
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LX7220 Scheda tecnica(HTML) 7 Page - Microchip Technology |
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7 / 24 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS20006704A-page 7 LX7220 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PINOUT DESCRIPTION Pin Number Pin Name Description 1 PGOOD Open Drain status output, requires external pull up resistor. This pin will go low when VOUT is outside the defined power good range, when the die is hotter than the thermal shutdown threshold, when PVIN is above the overvoltage threshold, or when PVIN is below the undervoltage threshold. PGOOD will go high after the last of these fault conditions clear. 2 SDA Serial data bus (bidirectional) for I2C. Connect directly to GND if unused. 3, PAD GND Ground. Connect to ground plane. 4, 9 SW Switching Node. Drives the external L-C low pass filter. 5, 6, 7, 8 VIN Input of IC and buck stage. Connect to input rail VIN (between 2.7V and 5.5V). A minimum input capacitance of one 1 μF and one 22 μF of X5R or better multilayer ceramic, should be placed very close to IC between this node and GND. 10 EN Enable for switching regulator. Force high to enable, force low to disable the IC. 11 AGND Analog Ground. Connect to ground plane. 12 VOUT Output voltage sense. Connect directly to output rail or resistive voltage divider output. 13 SCL Serial clock input for I2C. Connect directly to GND if unused. 14 AVIN Analog input voltage pin. |
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