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STM32F103C8T6 Scheda tecnica(PDF) 54 Page - STMicroelectronics |
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STM32F103C8T6 Scheda tecnica(HTML) 54 Page - STMicroelectronics |
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54 / 67 page ![]() Electrical characteristics STM32F103xx 54/67 Figure 22. USB timings: definition of data signal rise and fall time 5.3.16 CAN (controller area network) interface Refer to I/O port characteristics for more details on the input/output alternate function char- acteristics (CANTX and CANRX). 5.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 39 are derived from tests performed under ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table 7. Note: It is recommended to perform a calibration after each power-up. Table 38. USB: Full speed electrical characteristics Symbol Parameter Conditions Min Max Unit Driver characteristics tr Rise time(1) 1. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB Specification - Chapter 7 (version 2.0). CL = 50 pF 420 ns tf Fall Time(1) CL = 50 pF 4 20 ns trfm Rise/ fall time matching tr/tf 90 110 % VCRS Output signal crossover voltage 1.3 2.0 V ai14137 tf Differen tial Data L ines VSS VCRS tr Crossover points Table 39. ADC characteristics(1) Symbol Parameter Conditions Min Typ Max Unit VDDA ADC power supply 2.4V 3.6V V VREF+ Positive reference voltage 2.0 VDDA V fADC ADC clock frequency 0.6 14 MHz fS Sampling rate TBD 0.05 1 MHz fTRIG External trigger frequency fADC = 14 MHz 823 kHz 17 1/fADC VAIN Conversion voltage range(2) VSSA VDDA V |
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