LT8349ACBZ-R7 datasheet(8/29 Pages) AD

8 / 29 page

Data Sheet

LT8349

analog.com

Rev B

8 of 29

Forced Continuous = allowing negative inductor current. Not skipping pulse(s) (aligned

to clock), fixed switching frequency.

Sync = switching frequency synchronized to half of the SYNC clock frequency.

SSFM = Spread Spectrum Frequency Modulation for low EMI

SYNC/MODE Pin Input

Capable Mode(s) of Operations

SGND or <0.1V

Burst

50kΩ Resistor to SGND

Burst + SSFM

Float (Pin Open)

Forced Continuous

VIN

Forced Continuous + SSFM

External Clock

Forced Continuous + Sync Clock

EN/UVLO

Enable and Input Undervoltage Lockout Pin. The IC is shut down when this pin is

below 1V (typical). The IC draws a low VINcurrent of 0.5µA (typical) when this pin is

below 0.15V. The IC is enabled when this pin is above 1.035V (typical). A resistor divider

from VIN to SGND can be used to program a VIN threshold below which the IC is shut

down. Tie EN/UVLO to VIN if the shutdown and UVLO features are not used.

ISET

Channel 1 Burst Mode Bottom Switch Minimum Peak Current Adjust Input. This pin

allows three selectable burst mode peak current (IPK_BURST) levels for optimization of

performance.

ISET Pin Setting

Burst Mode Peak Current

(IPK_BURST) (typ)

VIN

1.7A

Float (Pin Open)

1.47A

SGND or < 0.4V

1.23A

BST2

This pin is used to provide a gate drive voltage to the top side power switch of channel

2. Place a 0.1µF bootstrap capacitor between BST2 and SW2 pins and close to the IC.

C1, D1,

E1, F1,

G1, C5,

D5, E5,

F5, G5

VOUT

Boost Converter Output Pins. Connect both rows of VOUT pins together on the PCB.

Bypass this pin to ground plane with low ESR ceramic capacitors. Place the capacitors

as close to the pins as possible. See the Applications Information section for a sample

layout.

C2, D2,

E2, F2,

SW1

The SW1 pins are the switching nodes of phase 1 internal power switches. Tie these

pins together and connect them to the phase 1 inductor and bootstrap capacitor.

These nodes should be kept small on the PCB for good EMI performance.

C3, D3,

E3, F3,

PGND

Power Ground.

C4, D4,

E4, F4,

SW2

The SW2 pins are the switching nodes of the phase 2 internal power switches. Tie these

pins together and connect them to the phase 2 inductor and bootstrap capacitor.

These nodes should be kept small on the PCB for good EMI performance.

LT8349ACBZ-R7 Scheda tecnica(PDF) 8 Page - Analog Devices

LT8349ACBZ-R7 Scheda tecnica(HTML) 8 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

Scheda tecnica Scarica

Link URL