Data Sheet

LT8349

analog.com

Rev B

15 of 29

APPLICATIONS INFORMATION

Programming V

IN Turn-On and Turn-Off Thresholds with the EN/UVLO Pin

The EN/UVLO pin controls whether the LT8349 is enabled or is in shutdown state. A 1.0V reference and a comparator

EN with 35mV hysteresis (Block Diagram) allow the user to accurately program the supply voltage at which the IC

turns on and off. The falling threshold voltage and rising hysteresis voltage of the VIN pin can be calculated by the

following equations:

VVIN,FALLING = 1V •

(R3 + R4)

R4

VVIN,RISING = 35mV •

(R3 + R4)

R4

+ VVIN,FALLING

When in Burst Mode operation with light load currents, the current through the resistor network R3 and R4 can easily

be greater than the supply current consumed by the IC. Therefore, large resistors can be used for R3 and R4 to

minimize their effect on efficiency at light loads. EN/UVLO pin can be tied to VIN if the shutdown feature is not used,

or alternatively, the pin may be tied to a logic level if shutdown control is required. The IC draws a low VIN quiescent

current of 0.5µA (typical) when EN/UVLO is below 0.15V.

Light Load Current Operation

The LT8349 features 2-phase with 180° out-of-phase operation at heavy loads. The LT8349 reduces to 1- phase

operation (Stage Shedding operation) to enhance the efficiency at light loads. At very light loads, the LT8349 features

selectable 1-phase low ripple Burst Mode operation or 1-phase Forced Continuous operation. Figure 24 shows the

simplified drawings of the LT8349 operations as the load current decreases from high current to very low current

gradually. Figure 24a shows the load current. Figure 24b shows the IL1 and IL2 currents when Burst Mode operation is

selected by SYNC/MODE pin. As shown in Figure 24b, LT8349 operates in 2-phase operation at heavy load. In 2-phase

operation, the inductor peak current of each channel matches each other. As each inductor peak current of 2-phase

operation reduces to the phase shedding threshold ISHED,DUAL (approximately 1.7A), the channel 2 is turned off (IL2 is

kept to 0A), and LT8349 operates in 1-phase operation. At the same time, the current gain of channel 1 is increased

by approximately 1.5 times to ensure a smooth transition, resulting in channel 1 inductor peak current phase

shedding threshold in 1-phase operation (ISHED,SINGLE) increasing by 1.5 (plus hysteresis 0.35A typ.) times:

ISHED,SINGLE ≈ (ISHED,DUAL + 0.35A) • 1.5

As the load current is further decreased, the channel 1 bottom switch minimum peak current (same as the inductor

minimum peak current) is set to IBURST, which is programmed by ISET pin, even though the VC node (Block Diagram)

indicates a lower value. In this condition, the LT8349 maintains the output regulation voltage by reducing the

switching frequency instead of reducing the inductor peak current. The LT8349 delivers single pulses of current to

the output capacitor followed by sleep periods (Figure 24b) during which most of the internal circuits are turned off

and the output power is supplied by the output capacitor. This low ripple Burst Mode operation minimizes the input

quiescent current and minimizes output voltage ripple. As the output load decreases, the frequency of single current

pulses decreases and the percentage of time the LT8349 is in sleep mode increases, resulting in much higher light

load efficiency than for typical converters. By maximizing the time between pulses, the converter VIN pin quiescent

current approaches 15µA for a typical application when there is no output load. To optimize the quiescent current

performance at light loads, the current in the feedback resistor divider should be minimized as it appears to the

output as load current.