DSP56303 datasheet(130/292 Pages) FREESCALE

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DSP56303 User’s Manual, Rev. 2

6-30

Freescale Semiconductor

Host Interface (HI08)

HSR

HRDF

Host Receive

Data Full

no receive data to be read

Receive Data Register is full

HTDE

Host Transmit

Data Empty

The Transmit Data Register is

empty.

The Transmit Data Register is not

empty.

HCP

Host Command

Pending

no host command pending

host command pending

HF0

Host Flag 0

—

HF1

Host Flag 1

—

HBAR

7–0

BA[10–3

]

Host Base

Address

$80

HRX

23–

DSP Receive

Data Register

empt

HTX

23–

DSP Transmit

Data Register

empt

HDR

16–

D[16–0]

GPIO signal

Data

$000

——

HDRR

16–

DR[16–

GPIO signal

Direction

Input

Output

$000

——

Table 6-20. HI08 Programming Model: Host Side

Reg

Bit

Reset Type

Name

Value

Function

HW/

Indi

vi-d

ual

STOP

ICR

RREQ

Receive Request Enable

HRRQ interrupt disabled

HRRQ interrupt enabled

0—

—

TREQ

Transmit Request Enable

HTRQ interrupt disabled

HTRQ interrupt enabled

0—

—

HDRQ

Double Host Request

HREQ/HTRQ = HREQ,

HACK/HRRQ = HACK

HREQ/HTRQ = HTRQ,

HACK/HRRQ = HRRQ

0—

—

HF0

Host Flag 0

—

HF1

Host Flag 1

—

HLEND

Host Little Endian

Big Endian order

Little Endian order

0—

—

INIT

Initialize

Reset data paths according to

TREQ and RREQ

0—

—

Table 6-19. HI08 Programming Model, DSP Side (Continued)

Bit

Reset Type

Bit

No.

Bit

Name

Value

Function

HW/

Indivi-

dual

STOP

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