STLM75 datasheet(31/37 Pages) STMICROELECTRONICS

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STLM75

DC and AC parameters

31/37

Figure 16.

Bus timing requirements sequence

Table 13.

AC characteristics

Sym

Parameter(1)

Valid for Ambient Operating Temperature: TA = –55 to 125°C; VDD = 2.7V to 5.5V (except where noted).

Min

Max

Unit

fSCL

SCL Clock Frequency

400

kHz

tBUF

Time the bus must be free before a new transmission can start

1.3

µs

SDA and SCL Fall Time

300

tHD:DAT

(2)

Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling

edge of SCL.

Data Hold Time

µs

tHD:STA

START Condition Hold Time (after this period the first clock pulse is

generated)

600

tHIGH

Clock High Period

600

tLOW

Clock Low Period

1.3

µs

SDA and SCL Rise Time

300

tSU:DAT

Data Setup Time

100

tSU:STA

START Condition Setup Time (only relevant for a repeated start

condition)

600

tSU:STO

STOP Condition Setup Time

600

tTIME-OUT SDA Time Low for Reset of Serial Interface

(3)

For SMBus compatibility, the STLM75 supports bus time-out. Holding the SDA line low for a time greater

than time-out will cause the STLM75 to reset the SDA to the idle state of serial bus communication (SDA

set to high).

325

AI00589

SDA

tSU:STO

tSU:STA

tHD:STA

SCL

tSU:DAT

tHD:DAT

tHIGH

tLOW

tHD:STA

tBUF

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