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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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TMP93CS41 Scheda tecnica(PDF) 63 Page - Toshiba Semiconductor |
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TMP93CS41 Scheda tecnica(HTML) 63 Page - Toshiba Semiconductor |
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63 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-61 3.5.3 Port 2 (P20 to P27) Port 2 is an 8-bit general-purpose I/O port. I/O can be set on a bit basis using the control register P2CR and function register P2FC. Resetting resets all bits of output latch P2, control register P2CR and function register P2FC to “0”. It also sets port 2 to input mode and connects a pull-down resistor. In addition to functioning as a general-purpose I/O port, port 2 also functions as an address bus (A0 to A7) or (A16 to A23). To use port 2 as an address bus, write 1 to the output latches to turn off the programmable pull-down resistors. Figure 3.5.5 Port 2 Port 2 P20 to P27 (A0 to A7 or A16 to A23) Direction control (on bit basis) Reset P2CR write Output latch P2 write Output buffer P2 read Selector A B S Function control (on bit basis) P2FC write Selector A B S Selector A B S A16 to A23 A0 to A7 N-ch Programmable pull down |
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