KSZ9567R_V01 datasheet(115/233 Pages) MICROCHIP

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DS00002329E-page 115

KSZ9567R

5.1.6.6

Global PTP RTC Clock Second Low Word Register

5.1.6.7

Global PTP Clock Sub-Nanosecond Rate High Word Register

5.1.6.8

Global PTP Clock Sub-Nanosecond Rate Low Word Register

Address:

0x050A - 0x050B

Size:

16 bits

Bits

Description

Type

Default

15:0

PTP Real Time Clock Second [15:0]

This is the low word of the second value of the PTP real time clock.

R/W

0x0000

Address:

0x050C - 0x050D

Size:

16 bits

Bits

Description

Type

Default

PTP Rate Direction

Rate direction control for PTP clock Temporary Adjustment and Continuous

Adjustment modes.

1 = The PTP Clock Sub-nanosecond value (this register and Global PTP

Clock Sub-Nanosecond Rate Low Word Register) will be added to the PTP

time every 25MHz clock cycle.

0 = The PTP Clock Sub-nanosecond value will be subtracted from the PTP

time every 25MHz clock cycle.

R/W

PTP Temporary Adjustment Mode

1 = Enable temporary incrementing or decrementing of the PTP clock by the

PTP Clock Sub-nanosecond value (this register and the Global PTP Clock

Sub-Nanosecond Rate Low Word Register) every 25MHz clock cycle, for the

duration set in the Global PTP Clock Temp Adjustment Duration High Word

0 = Stop temporary adjustment of the PTP clock

R/W

13:0

PTP Real Time Clock Sub-Nanosecond [29:16]

This is the high word of the sub-nanosecond value of the PTP real time

clock.

R/W

0x0000

Address:

0x050E - 0x050F

Size:

16 bits

Bits

Description

Type

Default

15:0

PTP Real Time Clock Sub-Nanosecond [15:0]

This is the low word of the sub-nanosecond value of the PTP real time clock.

It is used for Continuous Adjustment and Temporary Adjustment modes.

R/W

0x0000

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