PCM1774 datasheet(21/49 Pages) TI

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Packet Protocol

SDA

SCL

Start

1−7

1−8

Stop

Slave Address

ACK

DATA

ACK

DATA

ACK

Condition

R/W

Write Operation

Transmitter

Data Type

Slave Address

R/W

ACK

DATA

ACK

R/W:

Read Operation if 1; Otherwise, Write Operation

ACK:

Acknowledgement of a Byte if 0

DATA: 8 Bits (Byte)

T0049-03

M: Master Device

St: Start Condition

DATA

Read Operation

Transmitter

Data Type

Slave Address

R/W

ACK

DATA

NACK

DATA

S: Slave Device

Sp: Stop Condition

Transmitter

Data Type

Slave Address

Reg Address

Write Data

R0002-01

M: Master Device S: Slave Device

St: Start Condition W: Write ACK: Acknowledge Sp: Stop Condition

ACK

PCM1774

SLAS551 – JULY 2007

The master device must control packet protocol, which consists of start condition, slave address with read/write

bit, data (if write) or acknowledgment (if read), and stop condition. The PCM1774 supports only slave receiver

and slave transmitter.

Figure 20. Basic I2C Framework

WRITE OPERATION

The master can write any PCM1774 registers in a single access. The master sends a PCM1774 slave address

with a write bit, a register address, and data. When undefined registers are accessed, the PCM1774 does not

send any acknowledgment. Figure 21 shows a diagram of the write operation.

Figure 21. Framework for Write Operation

READ OPERATION

The master can read PCM1774 register. The value of the register address is stored in an indirect index register

in advance. The master sends a PCM1774 slave address with a read bit after storing the register address. Then

the PCM1774 transfers the data which the index register specifies. Figure 22 shows a diagram of the read

operation.

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