TMS320VC5505 datasheet(21/136 Pages) TI2

21 / 136 page

TMS320VC5505

www.ti.com

SPRS503B – JUNE 2009 – REVISED JANUARY 2010

Table 3-9. Inter-Integrated Circuit (I2C) Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

I2C

This pin is the I2C clock output. Per the I2C standard, an external pullup is required

SCL

I/O/Z

DVDDIO

on this pin.

This pin is the I2C bidirectional data signal. Per the I2C standard, an external pullup

SDA

I/O/Z

DVDDIO

is required on this pin.

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 4.8.1 , Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal

Table 3-10. Inter-IC Sound (I2S0 – I2S3) Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

Interface 0 (I2S0)

This pin is multiplexed between MMC0, I2S0, and GPIO.

MMC0_D0/

IPD

For I2S, it is I2S0 transmit data output I2S0_DX.

I2S0_DX/

I/O/Z

DVDDIO

Mux control via the SP0MODE bits in the EBSR. The IPD resistor on this pin can be

GP[2]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed between MMC0, I2S0, and GPIO.

MMC0_CLK/

IPD

For I2S, it is I2S0 clock input/output I2S0_CLK.

I2S0_CLK/

L10

I/O/Z

DVDDIO

Mux control via the SP0MODE bits in the EBSR. The IPD resistor on this pin can be

GP[0]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed between MMC0, I2S0, and GPIO.

MMC0_D1/

IPD

For I2S, it is I2S0 receive data input I2S0_RX.

I2S0_RX/

M10

I/O/Z

DVDDIO

Mux control via the SP0MODE bits in the EBSR. The IPD resistor on this pin can be

GP[3]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed between MMC0, I2S0, and GPIO.

MMC0_CMD/

IPD

For I2S, it is I2S0 frame synchronization input/output I2S0_FS.

I2S0_FS/

M11

I/O/Z

DVDDIO

Mux control via the SP0MODE bits in the EBSR. The IPD resistor on this pin can be

GP[1]

enabled or disabled via the PDINHIBR1 register.

Interface 1 (I2S1)

This pin is multiplexed between MMC1, I2S1, and GPIO.

MMC1_D0/

IPD

For I2S, it is I2S1 transmit data output I2S1_DX.

I2S1_DX/

M14

I/O/Z

DVDDIO

Mux control via the SP1MODE bits in the EBSR. The IPD resistor on this pin can be

GP[8]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed between MMC1, I2S1, and GPIO.

MMC1_CLK/

IPD

For I2S, it is I2S1 clock input/output I2S1_CLK.

I2S1_CLK/

M13

I/O/Z

DVDDIO

Mux control via the SP1MODE bits in the EBSR. The IPD resistor on this pin can be

GP[6]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed between MMC1, I2S1, and GPIO.

MMC1_D1/

IPD

For I2S, it is I2S1 receive data input I2S1_RX.

I2S1_RX/

M12

I/O/Z

DVDDIO

Mux control via the SP1MODE bits in the EBSR. The IPD resistor on this pin can be

GP[9]

enabled or disabled via the PDINHIBR1 register.

This pin is multiplexed betweenn MMC1, I2S2, and GPIO.

MMC1_CMD/

IPD

For I2S, it is I2S1 frame synchronization input/output I2S1_FS.

I2S1_FS/

L14

I/O/Z

DVDDIO

Mux control via the SP1MODE bits in the EBSR. The IPD resistor on this pin can be

GP[7]

enabled or disabled via the PDINHIBR1 register.

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 4.8.1 , Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal

Device Overview

Submit Documentation Feedback

Product Folder Link(s): TMS320VC5505

TMS320VC5505 Scheda tecnica(PDF) 21 Page - Texas Instruments

TMS320VC5505 Scheda tecnica(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL