TMS320VC5505 datasheet(72/136 Pages) TI2

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CLKOUT

INTx

WAKEUP

CLKOUT

(A)

TMS320VC5505

SPRS503B – JUNE 2009 – REVISED JANUARY 2010

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INT[1:0] can only be used as a wake-up event for IDLE3 and IDLE2 modes.

RTC interrupt (internal signal) can be used as wake-up event for IDLE3 and IDLE2 modes.

Any unmasked interrupt can be used to exit the IDLE2 mode.

CLKOUT reflects either the CPU clock, SAR, USB PHY, or PLL clock dependent on the setting of the CLOCKOUT

Clock Source Register. For this diagram, CLKOUT refers to the CPU clock.

Figure 6-12. Wake-Up From IDLE Timings

6.8.3

XF Electrical Data/Timing

Table 6-10. Switching Characteristics Over Recommended Operating Conditions For XF(1) (2)

(see Figure 6-13)

CVDD = 1.05 V

CVDD = 1.3 V

NO.

PARAMETER

UNIT

MIN

MAX

td(XF)

Delay time, CLKOUT high to XF high

10.2

(1)

P = 1/SYSCLK clock frequency in ns. For example, when running parts at 100 MHz, P = 10 ns.

(2)

C = 1/RTCCLK= 30.5 ms. RTCCLK is the clock output of the 32.768-kHz RTC oscillator.

CLKOUT reflects either the CPU clock, SAR, USB PHY, or PLL clock dependent on the setting of the CLOCKOUT

Clock Source Register. For this diagram, CLKOUT refers to the CPU clock.

Figure 6-13. XF Timings

6.9

External Memory Interface (EMIF)

VC5505 supports several memory and external device interfaces, including: NOR Flash, NAND Flash, and

SRAM.

The EMIF provides an 8-bit or 16-bit data bus, an address bus width up to 21 bits, and 4 chip selects,

along with memory control signals.

The EM_A[20:15] address signals are multiplexed with the GPIO peripheral and controlled by the External

Bus Selection Register (EBSR). For more detail on the pin muxing, see the Section 4.6.1, External Bus

Selection Register (EBSR).

6.9.1

EMIF Asynchronous Memory Support

The EMIF supports asynchronous:

•

SRAM memories

Peripheral Information and Electrical Specifications

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