CDx4HCT03 Quadruple 2-Input NAND Gates with Open-Drain Outputs

1 Features

• LSTTL input logic compatible

– VIL(max) = 0.8 V, VIH(min) = 2 V

• CMOS input logic compatible

– II ≤ 1 µA at VOL, VOH

• Buffered inputs

• 4.5 V to 5.5 V operation

• Wide operating temperature range:

-55°C to +125°C

• Supports fanout up to 10 LSTTL loads

• Significant power reduction compared to LSTTL

logic ICs

2 Applications

• Alarm / tamper detect circuit

• S-R latch

3 Description

This device contains four independent 2-input NAND

gates with open-drain outputs. Each gate performs

the Boolean function Y = A ● B in positive logic.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

CD74HCT03M

SOIC (14)

8.70 mm × 3.90 mm

CD74HCT03E

PDIP (14)

19.30 mm × 6.40 mm

CD54HCT03F

CDIP (14)

21.30 mm × 7.60 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

1

2

3

7

4

5

6

14

13

12

8

11

10

9

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

V

CC

3Y

Functional pinout

CD74HCT03, CD54HCT03

SCHS414 – JUNE 2020

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.