LP3921 datasheet(26/44 Pages) TI2

26 / 44 page

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DC BIAS (V)

100%

80%

60%

40%

20%

0402, 6.3V, X5R

0603, 10V, X5R

LP3921

SNVS580A – AUGUST 2008 – REVISED MAY 2013

www.ti.com

OUTPUT CAPACITOR

Correct selection of the output capacitor is critical to ensure stable operation in the intended application. The

output capacitor must meet all the requirements specified in the recommended capacitor table over all conditions

in the application. These conditions include DC-bias, frequency and temperature. Unstable operation will result if

the capacitance drops below the minimum specified value.

The LP3921 is designed specifically to work with very small ceramic output capacitors. The LDO's on the LP3921

are specifically designed to be used with X7R and X5R type capacitors. With these capacitors selection of the

capacitor for the application is dependant on the range of operating conditions and temperature range for that

application. (See CAPACITOR CHARACTERISTICS).

It is also recommended that the output capacitor be placed within 1 cm from the output pin and returned to a

clean ground line.

CAPACITOR CHARACTERISTICS

The LDO's on the LP3921 are designed to work with ceramic capacitors on the input and output to take

advantage of the benefits they offer. For capacitance values around 1 µF, ceramic capacitors give the circuit

designer the best design options in terms of low cost and minimal area.

Generally speaking, input and output capacitors require careful understanding of the capacitor specification to

ensure stable and correct device operation. Capacitance value can vary with DC bias conditions as well as

temperature and frequency of operation.

Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also

dependant on the particular case size with smaller sizes giving poorer performance figures in general.

Figure 9. DC Bias (V)

As an example, Figure 9 shows a typical graph showing a comparison of capacitor case sizes in a Capacitance

vs DC Bias plot. As shown in the graph, as a result of DC Bias condition the capacitance value may drop below

minimum capacitance value given in the recommended capacitor table (0.7 µF in this case). Note that the graph

shows the capacitance out of spec for 0402 case size capacitor at higher bias voltages. It is therefore

recommended that the capacitor manufacturers specifications for the nominal value capacitor are consulted for

all conditions as some capacitor sizes (e.g., 0402) may not be suitable in the actual application. Ceramic

capacitors have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of

a typical 1 µF ceramic capacitor is in the range of 20 m

Ω to 40 mΩ, and also meets the ESR requirements for

stability. The temperature performance of ceramic capacitors varies by type. Capacitor type X7R is specified with

a tolerance of ±15% over temperature range -55ºC to +125ºC. The X5R has similar tolerance over the reduced

temperature range -55ºC to +85ºC. Most large value ceramic capacitors (<2.2 µF) are manufactured with Z5U or

Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the

temperature goes from 25ºC to 85ºC. Therefore X7R is recommended over these other capacitor types in

applications where the temperature will change significantly above or below 25ºC.

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